1. Field of the Invention
This invention relates generally to semiconductor device packages. More specifically, the invention relates to package substrates with side/edge-mounted decoupling capacitors and their corresponding methods of fabrication.
2. Description of the Prior Art
A semiconductor device package is generally coupled to a printed circuit board (PCB) and powered by a system power supply located thereon. The system power supply is often connected to a system ground (ideally at a voltage potential of 0 Volts). The system power supply is also connected through power and ground leads to the package's power and ground planes for operating the semiconductor device package. Since the system power supply is often located a substantial distance away from the package, a long time delay and large inductance associated with the power and ground leads are introduced into the package's power delivery system. The package's power delivery system includes among other things all the connections between the package components (e.g., drivers) and their power sources (e.g., system power supply). As a result, the package components as well as the package as a whole operate in a suboptimal manner.
During its operation, a semiconductor device package may experience some degree of simultaneous switching noise (SSN). This may occur when multiple drivers switch simultaneously causing a voltage ripple in the device's power delivery system and offsetting the voltage reference within the semiconductor device package from its specified value. This voltage reference shift is commonly known as SSN and is exacerbated by the increased number of multiple drivers switching simultaneously in today's semiconductor device packages and the large inductance introduced by the earlier mentioned power and ground leads. As a result, SSN may cause errors in the operation of the die (e.g., drivers not responding correctly). Therefore, the more SSN present, the less reliable the semiconductor device package will become.
One approach for minimizing SSN is to include decoupling capacitors (also referred to as bypass capacitors) in the package's power delivery system. Conventionally, decoupling capacitors are mounted on the top surface or bottom surface of the package substrate. The positive terminal end and negative terminal end of the decoupling capacitor are connected by vias to the power plane and ground plane respectively.
However, package space and trace routing constraints make conventional implementation of decoupling capacitors and their decoupling performances limited. For example, the top and bottom surfaces of package substrates are typically reserved for input/output (I/O) connections, especially as the number of I/O increases in more complex semiconductor device packages. The surfaces may also be reserved for receiving a package structure, such as a heat spreader or a stiffener. Therefore, a very limited number of capacitors can be mounted on the top and bottom surfaces of the package substrate resulting in a limited capacitance effect on minimizing SSN.
In addition, the use of vias for on-package decoupling capacitors increases the equivalent series inductance (ESL) value for the semiconductor device package. This is because vias typically introduce a large impedance value in the decoupling capacitor's circuit, which fundamentally limits the effectiveness of the decoupling capacitor's performance.
Accordingly, there is a need to provide improved semiconductor device packages and corresponding packaging methods that can provide substantially instant power or control the amount of SSN generated, thereby improving semiconductor device packages' performances.